добавил логгирование и главный цикл цпу

здесь мы подошли к этапу разбора ассемблерного кода прочитанного в
CPU.ir, для этого нужен будет набор операций

.gitignore

@@ -2,6 +2,7 @@
 build/
 packages/
 .buildlog
+.pub
 
 # Or the files created by dart2js.
 *.dart.js

lib/halt.dart

@@ -4,7 +4,12 @@ class halt implements Exception{
   var msg;
   int code;
   halt._new(this.code, [this.msg]);
-  
+
+  @override
+  String toString(){
+    return "halt: $code $msg";
+  }
+
   static on({bool condition: false, int code: 100, msg}){
     if(!condition){
       throw new halt._new(code, msg);

lib/machine/app.dart

@@ -2,12 +2,23 @@ library machine;
 
 import 'dart:async';
 import 'package:tri/trisc/core.dart';
+import 'package:logging/logging.dart';
+import 'package:logging_handlers/logging_handlers_shared.dart';
+
+void tuneLog(){
+  startQuickLogging();
+  fmt.level = Level.ALL;
+}
 
 void init(){
   RAM r = MemFactory.newRAM(9841);
   CPU p = ProcFactory.newCPU(r);
   p.reset();
-  Future.doWhile((){
-    return (p.next() == CPU.ok);
-  });
+  p.debug = true;
+  Function step;
+  step = (){
+    if (p.next() != CPU.stop)
+      new Future.delayed(new Duration(milliseconds: 50), step);
+  };
+  step();
 }

lib/trisc/core.dart

@@ -2,7 +2,11 @@ library trisc;
 
 import 'package:tri/tri/mathe.dart';
 import 'package:tri/halt.dart';
+import 'package:logging/logging.dart';
 
 part 'asm.dart';
 part 'mem.dart';
 part 'proc.dart';
+part 'op.dart';
+
+final fmt = new Logger("trisc");

lib/trisc/mem.dart

@@ -21,9 +21,11 @@ class Mapper {
   static const int WORD = 3;
   RAM _ram;
 
+  int get length => _ram.length ~/ 3;
+
   int27 operator [](int adr) {
     int a = adr * WORD;
-    halt.on(condition: a >= 0 && a < _ram.length);
+    halt.on(condition: a >= 0 && a+3 < _ram.length, msg: adr);
     List<tryte> x = new List(3);
     for (int i = 0; i < WORD; i++) {
       x[i] = _ram[a + i];
@@ -53,13 +55,13 @@ class _stdRam extends RAM {
 
   @override
   tryte operator [](int adr) {
-    halt.on(condition: (adr >= 0 && adr < data.length), code: 20);
+    halt.on(condition: (adr >= 0 && adr < data.length), code: 20, msg: adr);
     return data[adr];
   }
 
   @override
   operator []=(int adr, tryte val) {
-    halt.on(condition: (adr >= 0 && adr < data.length), code: 20);
+    halt.on(condition: (adr >= 0 && adr < data.length), code: 20, msg: adr);
     data[adr] = val;
   }
 

lib/trisc/op.dart

@@ -0,0 +1,11 @@
+part of trisc;
+
+abstract class Operation{
+
+}
+
+class Op{
+  static Operation parse(int27 ir){
+
+  }
+}

lib/trisc/proc.dart

@@ -1,10 +1,18 @@
 part of trisc;
 
+class internal{
+  static final haltMe = new tryte(-13);
+  static final nop = new tryte.zero();
+}
+
 abstract class CPU{
   static const int ok = 0;
   static const int stop = 1;
   static const int skip = 2;
-  
+
+  bool get debug;
+  set debug(bool);
+
   void reset();
   int next();
 }
@@ -18,36 +26,64 @@ class ProcFactory{
   }
 }
 
+typedef int IRhandler(op);
+
 class _cpu extends CPU{
   int27 ir;
   int27 pc;
   int step = 0;
-  
+  bool _debug = false;
+
   int27 start = new int27.zero();
   RAM mem;
-  
-  Function handler(){
-    
+
+  @override
+  bool get debug => _debug;
+
+  @override
+  set debug(bool x){
+    this._debug = x;
   }
-  
-  void parse(int27 ir, Function(e)){
-    
+
+  IRhandler handler(){
+    return (op){
+
+    };
   }
-  
+
+  int parse(int27 ir, IRhandler h){
+    tryte format = short(ir >> 24);
+    if(format == internal.nop){
+      return CPU.skip;
+    }else if(format == internal.haltMe){
+      halt.on(condition: !debug, code: 146);
+      return CPU.stop;
+    }else{
+      return h(Op.parse(ir));
+    }
+  }
+
   @override
   void reset(){
     ir = new int27.zero();
     pc = start;
   }
-  
+
   @override
   int next(){
     step++;
     ir = new Mapper(mem)[pc.toInt()];
+    fmt.fine("step $step: [$pc]");
     pc += new int27.one();
-    return parse(ir, handler());
+    if(pc.toInt() == new Mapper(mem).length)
+      pc = new int27.zero();
+    fmt.fine(new Trits(ir));
+
+    int ret = parse(ir, handler());
+    fmt.fine("step $step: $ret");
+    return ret;
   }
-  
+
   _cpu(this.mem, this.start){
       reset();
   }

pubspec.yaml

@@ -6,4 +6,5 @@ environment:
 dependencies:
   browser: any
   libpen: any
+  logging_handlers: any
   unittest: any

web/main.dart

@@ -8,6 +8,7 @@ import 'dart:async';
 void main() {
   //testTri();
   //testMem();
+  machine.tuneLog();
   machine.init();
 
 //create the Console.
@@ -23,7 +24,7 @@ blink = (){
     console.setChar(2, 0, '_');
   show = !show;
   console.flush();
-  new Future.delayed(new Duration(milliseconds: 500), blink);  
+  new Future.delayed(new Duration(milliseconds: 500), blink);
 };
 blink();