Lola: synchronized with original

BlackBox/Po/Files/Divider.Lola.txt

@@ -3,7 +3,7 @@ MODULE Divider(
   OUT stall: BIT;
   IN x, y: WORD;  (*32 bit, y > 0*)
   OUT quot, rem: WORD);
-  REG S: [5] BIT;
+  REG (clk) S: [5] BIT;
     R, Q: WORD;
   VAR pos: BIT;
     x0, r0, r1, r2, q0, q1, d: WORD;

BlackBox/Po/Files/FPAdder.Lola.txt

@@ -2,7 +2,7 @@ MODULE FPAdder(   (*NW 2.11.2014*)
   IN clk, run, u, v: BIT; x, y: WORD;
   OUT stall: BIT; z: WORD);
 
-  REG Sum: [27] BIT;  (*pipe reg*)
+  REG (clk) Sum: [27] BIT;  (*pipe reg*)
     stallR: BIT;
 
   VAR xs, ys: BIT;  (*signs*)

BlackBox/Po/Files/FPDivider.Lola.txt

@@ -2,7 +2,7 @@ MODULE FPDivider(
   IN clk, run: BIT; x, y: WORD;
   OUT stall: BIT; z: WORD);
 
-  REG S: [5] BIT;   (*state*)
+  REG (clk) S: [5] BIT;   (*state*)
     R, Q: [24] BIT;   (*remainder, quotient*)
 
   VAR sign: BIT;

BlackBox/Po/Files/FPMultiplier.Lola.txt

@@ -2,7 +2,7 @@ MODULE FPMultiplier(
   IN clk, run: BIT; x, y: WORD;
   OUT stall: BIT; z: WORD);
 
-  REG S: [5] BIT;   (*state*)
+  REG (clk) S: [5] BIT;   (*state*)
     B2, A2: [24] BIT;
 
   VAR sign: BIT;

BlackBox/Po/Files/LSB.Mod.txt

@@ -1,4 +1,4 @@
-MODULE LSB;  (*Lola System Compiler Base, 16.11.2014*)
+MODULE LSB;  (*Lola System Compiler Base LSBX, 5.2.2015*)
   IMPORT Texts, Oberon;
   
   CONST
@@ -33,14 +33,14 @@ MODULE LSB;  (*Lola System Compiler Base, 16.11.2014*)
     ArrayTypeDesc* = RECORD (TypeDesc) eltyp*: Type END ;
     UnitTypeDesc* = RECORD (TypeDesc) firstobj*: Object END ;
 
-  VAR top*, root*: Object;
+  VAR root*, top*: Object;
     bitType*, integer*, string*: Type;
     byteType*, wordType*: ArrayType;
     modname*: ARRAY 32 OF CHAR;
 
-  PROCEDURE Record*(name: ARRAY OF CHAR; list: Object);
-  BEGIN modname := name; root := list
-  END Record;
+  PROCEDURE Register*(name: ARRAY OF CHAR; list: Object);
+  BEGIN modname := name; top := list
+  END Register;
 
 BEGIN NEW(bitType); bitType.len := 0; bitType.size := 1; NEW(integer); NEW(string);
   NEW(byteType); byteType.len := 8; byteType.size := 8; byteType.eltyp := bitType;

BlackBox/Po/Files/LSC.Mod.txt

@@ -1,4 +1,4 @@
-MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
+MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 25.2.2015 for RISC (LSCX)*)
   IMPORT Texts, Oberon, LSB, LSS;
   
   VAR sym: INTEGER;
@@ -93,7 +93,7 @@ MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
 
   PROCEDURE selector(VAR x: LSB.Item);
     VAR y, z: LSB.Item; obj: LSB.Object;
-      eltyp: LSB.Type; len: LONGINT;
+      eltyp: LSB.Type; len, kind: LONGINT;
   BEGIN
     WHILE (sym = LSS.lbrak) OR (sym = LSS.period) DO
       IF sym = LSS.lbrak THEN
@@ -103,12 +103,12 @@ MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
           IF (y.tag = LSB.lit) & (z.tag = LSB.lit) THEN
             len := y.val - z.val + 1; y := New(LSB.range, y, z); x := New(LSB.sel, x, y); x.type := LSB.string; x.size := len
           END
-        ELSE x := New(LSB.sel, x, y); x.type := eltyp
+        ELSE kind := x.val; x := New(LSB.sel, x, y); x.type := eltyp; x.val := kind
         END ;
         IF sym = LSS.rbrak THEN LSS.Get(sym) ELSE LSS.Mark("rbrak ?") END
       ELSE (*sym = LSS.period*) LSS.Get(sym); factor(y);
         IF (y.tag = LSB.lit) & (y.val >= x.type.len) THEN LSS.Mark("too large") END ;
-        eltyp := x.type(LSB.ArrayType).eltyp; x := New(LSB.sel, x, y); x.type := eltyp
+        eltyp := x.type(LSB.ArrayType).eltyp; kind := x.val; x := New(LSB.sel, x, y); x.type := eltyp; x.val := kind
       END
     END
   END selector;
@@ -255,9 +255,8 @@ MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
     VAR y, z: LSB.Item;
   BEGIN expression(y); apar := New(LSB.next, NIL, y); CheckAssign(fpar, y);
     IF fpar.val IN {3, 4} THEN  (*OUT or INOUT parameter*)
-      IF y.tag # 3 THEN  (*actual param is expression?*) LSS.Mark("bad actual param")
+      IF ~(y.tag IN {3, 7}) THEN  (*actual param is expression?*) LSS.Mark("bad actual param")
       ELSIF y.b = NIL THEN y.b := undef
-      ELSE LSS.Mark("mult def")
       END
     END
   END Param;
@@ -273,11 +272,9 @@ MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
       x := ThisObj(LSS.id); z := x; LSS.Get(sym); selector(z);
       IF sym = LSS.becomes THEN LSS.Get(sym);
         IF x.val >= 5 THEN LSS.Mark("assignment to read-only") END ;
-        IF x.b # NIL THEN LSS.Mark("mult assign") END ;
+        IF (x.b # NIL) & ~(x.type IS LSB.ArrayType) THEN LSS.Mark("mult assign") END ;
         expression(y); CheckAssign(z, y); x.b := y; (*tricky*)
-        IF z # x THEN
-          IF x.val = 0 THEN x.a := z.b ELSE LSS.Mark("illegal assignment") END
-        END
+        IF z # x THEN x.a := z.b; x.val := 1 (*overwriting clk field x.a *) END
       ELSIF sym = LSS.lparen THEN LSS.Get(sym);  (*unit instantiation*)
         IF x.type IS LSB.UnitType THEN
           unit := x.type(LSB.UnitType); fpar := unit.firstobj;
@@ -395,7 +392,7 @@ MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
       IF x IS LSB.Object THEN
         IF (x.tag = LSB.var) & (x.val >= 2) THEN  (*not reg*) 
           IF x(LSB.Object).marked THEN (*loop*)
-            Texts.WriteString(W, x(LSB.Object).name); Texts.Write(W, "|"); err := TRUE  (*global*)
+            Texts.WriteString(W, x(LSB.Object).name); Texts.Write(W, " "); err := TRUE
           ELSIF x.b # NIL THEN x(LSB.Object).marked := TRUE; Traverse(x.b)
           END ;
           x(LSB.Object).marked := FALSE
@@ -407,7 +404,7 @@ MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
 
   PROCEDURE Unit0(VAR locals: LSB.Object);
     VAR obj, oldtop: LSB.Object; kind: INTEGER; clock: LSB.Item;
-  BEGIN oldtop := top.next; top.next := LSB.top;  (*top is dummy*)
+  BEGIN oldtop := top.next; top.next := LSB.root;  (*top is dummy*)
     IF sym = LSS.lparen THEN LSS.Get(sym) ELSE LSS.Mark("lparen ?") END ;
     WHILE (sym = LSS.in) OR (sym = LSS.out) OR (sym = LSS.inout) DO ParamList END ;
     IF sym = LSS.rparen THEN LSS.Get(sym) ELSE LSS.Mark("rparen ?") END ;
@@ -420,24 +417,24 @@ MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
       IF sym = LSS.type THEN LSS.Get(sym);
         WHILE sym = LSS.ident DO TypeDeclaration END
       END ;
-      WHILE sym = LSS.var DO LSS.Get(sym);
-        WHILE sym = LSS.ident DO VarList(2, NIL) END
-      END ;
-      WHILE sym = LSS.reg DO LSS.Get(sym);
-        IF sym = LSS.lparen THEN (*clock*)
-          LSS.Get(sym); kind := 1; expression(clock);
-          IF sym = LSS.rparen THEN LSS.Get(sym) ELSE LSS.Mark("rparen ?") END
-        ELSE kind := 0; clock := NIL
-        END ;
-        WHILE sym = LSS.ident DO VarList(kind, clock) END
-      END ;
-      WHILE sym = LSS.var DO LSS.Get(sym);
-        WHILE sym = LSS.ident DO VarList(2, NIL) END
+      WHILE (sym = LSS.var) OR (sym = LSS.reg) DO
+        IF sym = LSS.var THEN LSS.Get(sym);
+          WHILE sym = LSS.ident DO VarList(2, NIL) END
+        ELSE (*reg*) kind := 0; LSS.Get(sym);
+          IF sym = LSS.lparen THEN (*clock*)
+            LSS.Get(sym); expression(clock);
+            IF clock.type # LSB.bitType THEN LSS.Mark("clock must be bitType") END ;
+            IF (clock IS LSB.Object) & (clock(LSB.Object).name = "clk") THEN kind := 1; clock := NIL END ;
+            IF sym = LSS.rparen THEN LSS.Get(sym) ELSE LSS.Mark("rparen ?") END
+          ELSE LSS.Mark("lparen expected"); clock := undef
+          END ;
+          WHILE sym = LSS.ident DO VarList(kind, clock) END
+        END
       END ;
       locals := top.next;
       IF sym = LSS.begin THEN LSS.Get(sym); StatSequence END ;
       obj := locals; err := FALSE;  (*find unassigned variables*)
-      WHILE obj # LSB.top DO
+      WHILE obj # LSB.root DO
         IF (obj.tag = LSB.var) & (obj.val < 5) THEN
           IF (obj.b = NIL) & (obj.val < 4) THEN Texts.WriteString(W, obj.name); Texts.Write(W, " "); err := TRUE
           ELSIF obj.b = undef THEN obj.b := NIL
@@ -445,21 +442,23 @@ MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
         END ;
         obj := obj.next
       END ;
-      IF err THEN LSS.Mark(" unassigned variables") END ;
-      obj := locals; err := FALSE;  (*find combinatorial loops*)
-      WHILE obj # LSB.top DO
-        IF obj.tag = LSB.var THEN obj.marked := TRUE; Traverse(obj.b); obj.marked := FALSE END ;
-        obj := obj.next
-      END ;
-      IF err THEN Texts.WriteLn(W); Texts.WriteString(W, " variables in comb. loops") END
+      IF err THEN Texts.WriteString(W, " unassigned"); Texts.WriteLn(W)
+      ELSE obj := locals; err := FALSE;  (*find combinatorial loops*)
+        WHILE obj # LSB.root DO
+          IF obj.tag = LSB.var THEN obj.marked := TRUE; Traverse(obj.b); obj.marked := FALSE END ;
+          obj := obj.next
+        END ;
+        IF err THEN Texts.WriteString(W, "in loop"); Texts.WriteLn(W) END
+      END
     END ;
+    IF err THEN Texts.Append(Oberon.Log, W.buf) END ;
     top.next := oldtop
   END Unit0;
 
   PROCEDURE Module(T: Texts.Text; pos: LONGINT);
     VAR root: LSB.Object; modname: ARRAY 32 OF CHAR;
-  BEGIN Texts.WriteString(W, "compiling Lola ");
-    bot := LSB.top; top.next := bot; LSS.Init(T, pos); LSS.Get(sym);
+  BEGIN Texts.WriteString(W, "compiling Lola: ");
+    bot := LSB.root; top.next := bot; LSS.Init(T, pos); LSS.Get(sym);
     IF sym = LSS.module THEN
       LSS.Get(sym);
       IF sym = LSS.ident THEN
@@ -467,12 +466,14 @@ MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
         Texts.WriteLn(W); Texts.Append(Oberon.Log, W.buf);
       ELSE LSS.Mark("ident ?")
       END ;
-      Unit(root); LSB.Record(modname, root);
+      Unit(root);
       IF sym = LSS.ident THEN LSS.Get(sym);
         IF LSS.id # modname THEN LSS.Mark("no match") END
       END ;
       IF sym # LSS.period THEN LSS.Mark("period ?") END ;
-      IF LSS.error THEN Texts.WriteString(W, "compilation failed"); Texts.WriteLn(W) END
+      IF ~LSS.error THEN LSB.Register(modname, root)
+      ELSE Texts.WriteString(W, "compilation failed"); Texts.WriteLn(W); LSB.Register("", LSB.root)
+      END
     ELSE LSS.Mark("module ?")
     END ;
     Texts.Append(Oberon.Log, W.buf)
@@ -495,7 +496,7 @@ MODULE LSC;  (*Lola System Compiler, NW 8.1.95 / 18.11.2014*)
   END Compile;
 
 BEGIN Texts.OpenWriter(W);
-  Texts.WriteString(W, "Lola compiler; NW 18.11.2014"); Texts.WriteLn(W);
-  NEW(top); bot := LSB.top; NEW(undef); undef.tag := 2; undef.type := LSB.bitType;
+  Texts.WriteString(W, "Lola compiler; NW 20.2.2015"); Texts.WriteLn(W);
+  NEW(top); bot := LSB.root; NEW(undef); undef.tag := 2; undef.type := LSB.bitType;
   factor := factor0; expression := expression0; Unit := Unit0
 END LSC.

BlackBox/Po/Files/LSP.Mod.txt

@@ -1,4 +1,4 @@
-MODULE LSP;  (*display data structure;  NW 7.9.2014*)
+MODULE LSP;  (*display data structure;  NW 5.2.2014*)
   IMPORT Texts, Oberon, LSB;
 
   VAR W: Texts.Writer;
@@ -37,13 +37,13 @@ MODULE LSP;  (*display data structure;  NW 7.9.2014*)
     VAR apar: LSB.Item; obj1: LSB.Object;
   BEGIN
     IF n > 0 THEN Texts.Write(W, 9X) END ;
-    Texts.WriteString(W, C[obj.tag]); Texts.Write(W, " "); Texts.WriteString(W, obj.name);
+    Texts.WriteString(W, C[obj.tag]); Texts.Write(W, " "); Texts.WriteString(W, obj.name); Texts.Append(Oberon.Log, W.buf);
     IF obj.tag = LSB.const THEN Texts.WriteString(W, " = "); PrintTree(obj.b, 1); Texts.WriteLn(W)
     ELSIF obj.tag = LSB.typ THEN
       IF obj.type IS LSB.UnitType THEN  (*formal param list*)
         obj1 := obj.type(LSB.UnitType).firstobj;
         Texts.WriteString(W, " BEGIN "); Texts.WriteLn(W);
-        WHILE (obj1 # NIL) & (obj1 # LSB.top) DO PrintObj(obj1, 0); obj1 := obj1.next END ;
+        WHILE (obj1 # NIL) & (obj1 # LSB.root) DO PrintObj(obj1, 0); obj1 := obj1.next END ;
         Texts.WriteString(W, "END"); Texts.WriteLn(W)
       ELSE PrintType(obj.type)
       END
@@ -55,18 +55,23 @@ MODULE LSP;  (*display data structure;  NW 7.9.2014*)
         Texts.Write(W, "]"); Texts.WriteLn(W)
       ELSE PrintType(obj.type);
         Texts.WriteString(W, " #"); Texts.WriteInt(W, obj.val, 1);
-        IF obj.a # NIL THEN (*indexed*) Texts.WriteString(W, " SEL"); PrintTree(obj.a, 1) END ;
+        IF obj.a # NIL THEN
+           IF obj.val = 0 THEN Texts.WriteString(W, " CLK") ELSIF obj.val = 1 THEN (*indexed*) Texts.WriteString(W, " DEMUX") END ;
+           PrintTree(obj.a, 1)
+        END ;
         IF obj.b # NIL THEN Texts.WriteString(W, " := "); Texts.WriteLn(W); PrintTree(obj.b, 1)
         ELSE Texts.WriteLn(W)
         END
       END
-    END
+    END ;
+    Texts.Append(Oberon.Log, W.buf)
   END PrintObj;
 
   PROCEDURE List*;
     VAR obj: LSB.Object;
-  BEGIN obj := LSB.root;
-    WHILE obj # LSB.top DO PrintObj(obj, 0); obj := obj.next END ;
+  BEGIN obj := LSB.top;
+    Texts.WriteString(W, "listing "); Texts.WriteString(W, LSB.modname); Texts.WriteLn(W);
+    WHILE (obj # LSB.root) & (obj # NIL) DO PrintObj(obj, 0); obj := obj.next END ;
     Texts.Append(Oberon.Log, W.buf)
   END List;
 

BlackBox/Po/Files/LSS.Mod.txt

@@ -1,4 +1,4 @@
-MODULE LSS; (* NW 16.10.93 / 22.9.2014*)
+MODULE LSS; (* NW 16.10.93 / 25.2.2015*)
   IMPORT Texts, Oberon;
   
   CONST IdLen* = 32; NofKeys = 10;
@@ -92,7 +92,8 @@ MODULE LSS; (* NW 16.10.93 / 22.9.2014*)
   BEGIN
     REPEAT
       WHILE ~R.eot & (ch <= " ") DO Texts.Read(R, ch) END;
-      IF ch < "A" THEN 
+      IF R.eot THEN sym := eof
+      ELSIF ch < "A" THEN 
         IF ch < "0" THEN
           IF ch = "!" THEN Texts.Read(R, ch); sym := repl
           ELSIF ch = "#" THEN Texts.Read(R, ch); sym := neq

BlackBox/Po/Files/LSV.Mod.txt

@@ -1,4 +1,4 @@
-MODULE LSV;  (*Lola System: display Verilog; generate txt-File; NW 26.10.2014*)
+MODULE LSV;  (*Lola System: display Verilog; generate txt-File; NW 20.2.2015*)
   IMPORT Files, Texts, Oberon, LSB;
 
   VAR W: Texts.Writer;
@@ -120,7 +120,7 @@ MODULE LSV;  (*Lola System: display Verilog; generate txt-File; NW 26.10.2014*)
   PROCEDURE ObjList0(obj: LSB.Object);  (*declarations*)
     VAR obj1: LSB.Object; param: BOOLEAN;
   BEGIN param := TRUE;
-    WHILE obj # LSB.top DO
+    WHILE obj # LSB.root DO
       IF (obj.tag = LSB.var) & ~(obj.type IS LSB.UnitType) THEN
         IF obj.val <= 1 THEN WriteString("reg ")
         ELSIF obj.val = 2 THEN WriteString("wire ")
@@ -152,7 +152,7 @@ MODULE LSV;  (*Lola System: display Verilog; generate txt-File; NW 26.10.2014*)
   PROCEDURE ObjList1(obj: LSB.Object);  (*assignments to variables*)
     VAR apar: LSB.Item; fpar: LSB.Object;
   BEGIN
-    WHILE obj # LSB.top DO
+    WHILE obj # LSB.root DO
       IF (obj.tag = LSB.var) OR (obj.tag = LSB.const) THEN
         IF obj.type IS LSB.UnitType THEN
           WriteString(obj.type.typobj.name); Write(" "); WriteString(obj.name);
@@ -161,8 +161,9 @@ MODULE LSV;  (*Lola System: display Verilog; generate txt-File; NW 26.10.2014*)
           WHILE apar # NIL DO WriteString(", "); ActParam(apar.b, fpar); apar := apar.a; fpar := fpar.next END ;
           Write(")"); Write(";"); WriteLn
         ELSIF (obj.b # NIL) & (obj.val >= 2) THEN
-          WriteString("assign "); WriteString(obj.name); WriteString(" = ");
-          Expression(obj.b); Write(";"); WriteLn
+          WriteString("assign "); WriteString(obj.name);
+          IF (obj.a # NIL) THEN Write("["); Expression(obj.a); Write("]") END ;
+          WriteString(" = "); Expression(obj.b); Write(";"); WriteLn
         END
       ELSIF obj.tag = LSB.typ THEN (*instantiation; actual parameters*)
       END ;
@@ -171,31 +172,24 @@ MODULE LSV;  (*Lola System: display Verilog; generate txt-File; NW 26.10.2014*)
   END ObjList1;
 
   PROCEDURE ObjList2(obj: LSB.Object);  (*assignments to registers*)
-    VAR apar: LSB.Item; fpar: LSB.Object;
-  BEGIN WriteString("always @ (posedge clk) begin"); WriteLn;
-    WHILE obj # LSB.top DO
-      IF (obj.tag = LSB.var) & ~(obj.type IS LSB.UnitType) & (obj.val = 0) & (obj.b # NIL) THEN
-        WriteString(obj.name);
-        IF obj.a # NIL THEN Write("["); Expression(obj.a); Write("]") END ;
-        WriteString(" <= "); Expression(obj.b); Write(";"); WriteLn
-      END ;
-      obj := obj.next
-    END ;
-    WriteString("end"); WriteLn
-  END ObjList2;
-
-  PROCEDURE ObjList3(obj: LSB.Object);  (*assignments to registers with explicit clocks*)
-    VAR apar: LSB.Item; fpar: LSB.Object;
+    VAR apar: LSB.Item; kind: LONGINT; clk: LSB.Item;
   BEGIN
-    WHILE obj # LSB.top DO
-      IF (obj.tag = LSB.var) & ~(obj.type IS LSB.UnitType) & (obj.val = 1) & (obj.b # NIL) THEN
-        WriteString("always @ (posedge "); Expression(obj.a); WriteString(") begin ");
-        WriteString(obj.name);
-        WriteString(" <= "); Expression(obj.b); WriteString("; end"); WriteLn
-      END ;
-      obj := obj.next
+    WHILE obj # LSB.root DO
+      IF (obj.tag = LSB.var) & ~(obj.type IS LSB.UnitType) & (obj.val < 2) THEN
+        WriteString("always @ (posedge "); kind := obj.val;
+        IF kind = 0 THEN Expression(obj.a)
+        ELSE (*kind = 1*) WriteString("clk")
+        END ;
+        WriteString(") begin ");
+        REPEAT WriteString(obj.name);
+          IF (kind = 1) & (obj.a # NIL) THEN Write("["); Expression(obj.a); Write("]") END ;
+          WriteString(" <= "); Expression(obj.b); Write(";"); WriteLn; obj := obj.next
+        UNTIL (obj = LSB.top) OR (obj.val # kind);
+        WriteString("end"); WriteLn
+      ELSE obj := obj.next
+      END
     END
-  END ObjList3;
+  END ObjList2;
 
   PROCEDURE List*;
     VAR S: Texts.Scanner;
@@ -205,8 +199,7 @@ MODULE LSV;  (*Lola System: display Verilog; generate txt-File; NW 26.10.2014*)
       F := Files.New(S.s); Files.Set(R, F, 0);
       WriteString("`timescale 1ns / 1 ps"); WriteLn;
       WriteString("module "); WriteString(LSB.modname); WriteString("(   // translated from Lola"); WriteLn;
-      ObjList0(LSB.root); ObjList1(LSB.root);
-      ObjList2(LSB.root); ObjList3(LSB.root);
+      ObjList0(LSB.top); ObjList1(LSB.top); ObjList2(LSB.top);
       WriteString("endmodule"); WriteLn;
       Files.Register(F); Texts.WriteString(W, " done"); Texts.WriteLn(W); Texts.Append(Oberon.Log, W.buf)
     END

BlackBox/Po/Files/MouseP.Lola.txt

@@ -2,19 +2,20 @@ MODULE MouseP (
   IN clk, rst: BIT;
   INOUT io: [2] BIT;
   OUT out: [28] BIT);
-
   (* init mouse cmd F4 (start reporting) with start, parity and stop bits added *)
   CONST InitBuf := $FFFFFDE8;  (* 1...1 1 0 1111 0100 0 *)
-  TYPE PS2BUF = MODULE (OUT O: [2] BIT; INOUT IO: [2] BIT; IN T: [2] BIT) ^;
-  REG x, y: [10] BIT;   (*counters*)
+  TYPE IOBUF = MODULE (IN I: BIT; OUT O: BIT; INOUT IO: BIT; IN T: BIT) ^;
+  REG (clk) x, y: [10] BIT;   (*counters*)
     btns: [3] BIT;
     Q0, Q1, run: BIT;
     shreg: [32] BIT;
-  VAR shift, endbit, reply: BIT;
+  VAR buf0, buf1: IOBUF;
+    msclk, msdat: BIT;
+    shift, endbit, reply: BIT;
     dx, dy: [10] BIT;
-    in: [2] BIT;
-    ps2buf: PS2BUF;
-BEGIN ps2buf(in, io, {run | shreg[0], rst});  (*open-collector wiring*)
+BEGIN
+  buf0 (0, msclk, io.0, rst);
+  buf1 (0, msdat, io.1, run | shreg.0);
   shift := Q1 & ~Q0;   (*falling edge detector*)
   reply := ~run & ~shreg.11;   (*start bit of echoed initBuf, if response*)
   endbit := run & ~shreg.0;   (*normal packet received*)
@@ -23,8 +24,8 @@ BEGIN ps2buf(in, io, {run | shreg[0], rst});  (*open-collector wiring*)
   out := {run, btns, 0'2, y, 0'2, x};
 
   run := rst & (reply | run);
-  Q0 := in[0]; Q1 := Q0;
-  shreg := ~rst -> InitBuf : (endbit | reply) -> $FFFFFFFF'32 : shift -> {in[1], shreg[31:1]} : shreg;
+  Q0 := msclk; Q1 := Q0;
+  shreg := ~rst -> InitBuf : (endbit | reply) -> $FFFFFFFF'32 : shift -> {msdat, shreg[31:1]} : shreg;
   x := ~rst -> 0'10 : endbit -> x + dx : x;
   y := ~rst -> 0'10 : endbit -> y + dy : y;
   btns := ~rst -> 0'3 : endbit -> {shreg.1, shreg.3, shreg.2} : btns

BlackBox/Po/Files/Multiplier.Lola.txt

@@ -1,4 +1,27 @@
-MODULE Multiplier (     (*NW 5.10.2014*)
+MODULE Multiplier (     (*NW 7.9.2014*)
+  IN clk, run, u: BIT;
+  OUT stall: BIT;
+  IN x, y: WORD;   (*32 bit*)
+  OUT z: [64] BIT);
+
+  VAR b0, b00, b01: [33] BIT;
+    b1, a0, a1: WORD;
+  REG (clk) S: [5] BIT;   (*state*)
+    B, A: WORD;   (*high and low parts of partial product*)
+
+BEGIN stall := run & ~(S = 31);
+  b00 := (S = 0) -> 0'33 : {B.31, B};
+  b01 := a0.0 -> {y.31 & u, y} : 0'33;
+  b0 := ((S = 31) & u) -> b00 - b01: b00 + b01;
+  b1 := b0[32:1];
+  a0 := (S = 0) -> x : A;
+  a1 := {b0.0, a0[31:1]};
+  z := {b1, a1};
+  B := b1; A := a1;
+  S := run -> S+1 : 0
+END Multiplier.
+
+MODULE Multiplier1 (     (*NW 5.10.2014*)
   IN clk, run, u: BIT;
   OUT stall: BIT;
   IN x, y: WORD;   (*32 bit*)
@@ -8,7 +31,7 @@ MODULE Multiplier (     (*NW 5.10.2014*)
 
   VAR M0, M1, M2, M3: MULT18X18;
     p0, p1, p2, p3: [36] BIT;
-  REG S: BIT;   (*state*)
+  REG (clk) S: BIT;   (*state*)
     z0: [16] BIT; z1, z2: [48] BIT;
 BEGIN 
   M0(p0, {0'2, x[15:0]}, {0'2, y[15:0]});
@@ -21,4 +44,4 @@ BEGIN
   z0 := p0[15:0];
   z1 := {0'32, p0[31:16]} + {(u&p1.31)!16, p1[31:0]};
   z2 := {u&p2.31!16, p2[31:0]} + {p3[31:0], 0'16}
-END Multiplier.
+END Multiplier1.

BlackBox/Po/Files/PS2.Lola.txt

@@ -4,7 +4,8 @@ MODULE PS2 (
   OUT data: BYTE;
   IN PS2C, PS2D: BIT);
 
-  REG Q0, Q1: BIT;   (*synchronizer and falling edge detector*)
+  REG (clk)
+    Q0, Q1: BIT;   (*synchronizer and falling edge detector*)
     shreg: [11] BIT;
     inptr, outptr: [4] BIT;
     fifo: [16] BYTE;

BlackBox/Po/Files/RISC5.Lola.txt

@@ -8,7 +8,7 @@ MODULE RISC5 (IN clk, rst, stallX: BIT;  (*NW 31.10.2014*)
 
   TYPE PROM := MODULE (IN adr: [11] BIT; OUT data: WORD; IN clk: BIT) ^;
 
-    Multiplier := MODULE (IN clk, run, u: BIT;
+    Multiplier1 := MODULE (IN clk, run, u: BIT;
       OUT stall: BIT;
       IN x, y: WORD;
       OUT z: [64] BIT) ^;
@@ -28,7 +28,7 @@ MODULE RISC5 (IN clk, rst, stallX: BIT;  (*NW 31.10.2014*)
       IN x, y: WORD; OUT z: WORD) ^;
 
 
-  REG PC: [18] BIT;
+  REG (clk) PC: [18] BIT;
     IRBuf: WORD;
     N, Z, C, OV: BIT;
     stall1, PMsel: BIT;
@@ -59,7 +59,7 @@ MODULE RISC5 (IN clk, rst, stallX: BIT;  (*NW 31.10.2014*)
     Fadd, Fsub, Fmul, Fdiv, Ldr, Str, Br: BIT;
 
     PM: PROM;
-    mulUnit: Multiplier;
+    mulUnit: Multiplier1;
     divUnit: Divider;
     faddUnit: FPAdder;
     fmulUnit: FPMultiplier;

BlackBox/Po/Files/RISC5Top.Lola.txt

@@ -1,4 +1,4 @@
-MODULE RISC5Top(   (*NW 2.11.2014*)
+MODULE RISC5Top(   (*NW 4.12.2014*)
   IN CLK50M: BIT;
   IN btn: [4] BIT;
   IN swi: BYTE;
@@ -15,8 +15,7 @@ MODULE RISC5Top(   (*NW 2.11.2014*)
   OUT hsync, vsync: BIT;   (*video control*)
   OUT RGB: [3] BIT;
   INOUT PS2C, PS2D: BIT;   (*keyboard*)
-  IN mouse: [7] BIT;
-(* INOUT mouse: [2] BIT; *)
+  INOUT mouse: [2] BIT;
   INOUT gpio: BYTE);
 
 (* I/O addresses:
@@ -53,17 +52,13 @@ TYPE RISC5 := MODULE (
     OUT MOSI, SCLK: BIT)  ^;
 
   VID := MODULE (
-    IN clk, clk25, inv: BIT; viddata: WORD;
+    IN clk, inv: BIT; viddata: WORD;
     OUT req: BIT; vidadr: [18] BIT;
       hsync, vsync: BIT; RGB: [3] BIT) ^;
 
-  MouseX := MODULE ( 
-    IN clk: BIT; in: [7] BIT;
-    OUT out: [28] BIT) ^;
-
-(* MouseP := MODULE ( 
+  MouseP := MODULE ( 
     IN clk, rst: BIT; INOUT io: [2] BIT;
-    OUT out: [28] BIT) ^; *)
+    OUT out: [28] BIT) ^;
 
   PS2 = MODULE (
     IN clk, rst, done: BIT;
@@ -82,7 +77,7 @@ TYPE RISC5 := MODULE (
 
 VAR clk, clk50: BIT;
 REG (clk50) clk25: BIT;
-REG rst: BIT;
+REG (clk) rst: BIT;
   bitrate: BIT;   (*RS-232*)
   Lreg: BYTE;  (*LED*)
   cnt0: [16] BIT;
@@ -96,8 +91,7 @@ VAR riscx: RISC5;
   spi: SPI;  (*CD-ROM and net*)
   vid: VID;
   kbd: PS2;
-  Ms: MouseX;
-(* Ms: MouseP; *)
+  Ms: MouseP;
   clkInBuf: IBUFG;
   clk150buf: BUFG;
   sramBuf: IOBUF32;
@@ -127,10 +121,9 @@ BEGIN
   receiver (clk, rst, doneRx, RxD, bitrate, rdyRx, dataRx);
   transmitter (clk, rst, startTx, bitrate, dataTx, rdyTx, TxD);
   spi (clk, rst, spiStart, spiCtrl.2, outbus, spiRx, spiRdy, MISO.0 & MISO.1, MOSI1, SCLK1); 
-  vid (clk, clk25, swi.7, inbus1, dspreq, vidadr, hsync, vsync, RGB);
+  vid (clk, swi.7, inbus1, dspreq, vidadr, hsync, vsync, RGB);
   kbd (clk, rst, doneKbd, rdyKbd, dmy, dataKbd, PS2C, PS2D);
-  Ms (clk, mouse, dataMs);
-(* Ms (clk, rst, mouse, dataMs); *)
+  Ms (clk, rst, mouse, dataMs);
   sramBuf (outbus1, inbus1, SRdat, ~wr);
   gpioBuf (gpout, gpin, gpio, ~gpoc);
 

BlackBox/Po/Files/RS232R.Lola.txt

@@ -1,7 +1,7 @@
 MODULE RS232R (    (*NW 15.9.2014*)
   IN clk, rst, done, RxD, fsel: BIT;
   OUT rdy: BIT; data: BYTE);
-  REG run, stat: BIT;
+  REG (clk) run, stat: BIT;
     tick: [12] BIT;
     bitcnt: [4] BIT;
     shreg: BYTE;

BlackBox/Po/Files/RS232T.Lola.txt

@@ -1,7 +1,7 @@
 MODULE RS232T (IN clk, rst: BIT;   (*NW 15.9.2014*)
   IN start, fsel: BIT;  (*request to send a byte / freq select*)
   IN data: BYTE; OUT rdy, TxD: BIT);
-  REG run: BIT;
+  REG (clk) run: BIT;
     tick: [12] BIT;
     bitcnt: [4] BIT;
     shreg: [9] BIT;

BlackBox/Po/Files/SPI.Lola.txt

@@ -4,7 +4,7 @@ MODULE SPI (
   IN MISO: BIT;
   OUT MOSI, SCLK: BIT);
 
-  REG rdyR: BIT;
+  REG (clk) rdyR: BIT;
     shreg: WORD;
     tick: [6] BIT;
     bitcnt: [5] BIT;

BlackBox/Po/Files/VID.Lola.txt

@@ -14,7 +14,7 @@ MODULE VID (
       vcnt: [10] BIT;
     hblank: BIT;
     pixbuf, vidbuf: WORD;
-  REG req1: BIT;
+  REG (clk) req1: BIT;
     hword: [5] BIT;  (*from hcnt, but latched in the clk domain*)
 
 BEGIN dcmx3 (clk, pclk);  (* pixel clock generation *)

README.md

@@ -1,3 +1,3 @@
 [Project Oberon](http://www.inf.ethz.ch/personal/wirth/ProjectOberon/index.html) @ [BlackBox Component Builder](http://www.oberon.ch/blackbox.html)
 
-Alexander V. Shiryaev, 2014
+Alexander V. Shiryaev, 2015