omit nil check on procedure call (HardFault will occur anyway)

voc-O7/O7ARMv6MG.Mod

@@ -1,6 +1,6 @@
 MODULE O7ARMv6MG; (* NW  18.4.2016 / 31.5.2019  code generator in Oberon-07 for RISC*)
 
-	(* Modified for ARMv6-M by A. V. Shiryaev, 2016.05.07, 2019.10.21 *)
+	(* Modified for ARMv6-M by A. V. Shiryaev, 2016.05.07, 2019.10.21, 2023.06.21 *)
 
 	(*
 http://www.inf.ethz.ch/personal/wirth/FPGA-relatedWork/RISC-Arch.pdf
@@ -1810,6 +1810,11 @@ http://www.inf.ethz.ch/personal/wirth/Oberon/Oberon.ARM.Compiler.pdf
 	END PrepCall;
 
 	PROCEDURE Call*(VAR x: Item; r: LONGINT);
+		CONST check = FALSE;
+			(* is not necessary:
+					HardFault trap (with pc=0) will occur,
+					because no Thumb flag in initialSP
+			*)
 	BEGIN (*x.type.form = ORB.Proc*)
 		IF x.mode = ORB.Const THEN
 			IF x.r >= 0 THEN Put3(BL, 7, (x.a DIV 4)-pc-1)
@@ -1828,10 +1833,12 @@ http://www.inf.ethz.ch/personal/wirth/Oberon/Oberon.ARM.Compiler.pdf
 				END
 			END
 		ELSE
-			IF x.mode <= ORB.Par THEN load(x); DEC(RH)
+			IF x.mode <= ORB.Par THEN
+				IF check THEN load(x) ELSE load0(0, x) END;
+				DEC(RH)
 			ELSE
 				Put20(0, Ldr, RH, SP, 0); Put10(0, Add, SP, SP, 4);
-				Put1(Cmp, RH, RH, 0);
+				IF check THEN Put1(Cmp, RH, RH, 0) END;
 				DEC(r); DEC(frame, 4)
 			END;
 			IF check THEN Trap(EQ, 5) END;

voc-O7/O7ARMv6MP.Mod

@@ -1006,7 +1006,7 @@ MODULE O7ARMv6MP; (*N. Wirth 1.7.97 / 8.2.2020	Oberon compiler for RISC in Obero
 		(*Oberon.Collect(0)*)
 	END Compile;
 
-BEGIN Texts.OpenWriter(W); Texts.WriteString(W, "Oberon -> ARMv6-M Compiler  8.2.2020");
+BEGIN Texts.OpenWriter(W); Texts.WriteString(W, "Oberon -> ARMv6-M Compiler  21.6.2023");
 	Texts.WriteLn(W); Texts.Append(Oberon.Log, W.buf);
 	NEW(dummy); dummy.class := ORB.Var; dummy.type := ORB.intType;
 	expression := expression0; Type := Type0; FormalType := FormalType0

voc-O7/O7ARMv7MG.Mod

@@ -1,6 +1,6 @@
 MODULE O7ARMv7MG; (* NW  18.4.2016 / 31.5.2019  code generator in Oberon-07 for RISC*)
 
-	(* Modified for ARMv7-M by A. V. Shiryaev, 2018.05.25, 2019.10.21, 2021.08.08 *)
+	(* Modified for ARMv7-M by A. V. Shiryaev, 2018.05.25, 2019.10.21, 2021.08.08, 2023.06.21 *)
 
 	(*
 http://www.inf.ethz.ch/personal/wirth/FPGA-relatedWork/RISC-Arch.pdf
@@ -2263,6 +2263,11 @@ http://infocenter.arm.com/help/topic/com.arm.doc.ddi0439d/DDI0439D_cortex_m4_pro
 	END PrepCall;
 
 	PROCEDURE Call*(VAR x: Item; r: LONGINT);
+		CONST check = FALSE;
+			(* is not necessary:
+					HardFault trap (with pc=0) will occur,
+					because no Thumb flag in initialSP
+			*)
 	BEGIN (*x.type.form = ORB.Proc*)
 		IF x.mode = ORB.Const THEN
 			IF x.r >= 0 THEN Put3(BL, 7, (x.a DIV 4)-pc-1)
@@ -2280,10 +2285,12 @@ http://infocenter.arm.com/help/topic/com.arm.doc.ddi0439d/DDI0439D_cortex_m4_pro
 				END
 			END
 		ELSE
-			IF x.mode <= ORB.Par THEN load(x); DEC(RH)
+			IF x.mode <= ORB.Par THEN
+				IF check THEN load(x) ELSE load0(0, x) END;
+				DEC(RH)
 			ELSE
 				Put20(0, Ldr, RH, SP, 0); Put10(0, Add, SP, SP, 4);
-				Put1(Cmp, RH, RH, 0);
+				IF check THEN Put1(Cmp, RH, RH, 0) END;
 				DEC(r); DEC(frame, 4)
 			END;
 			IF check THEN Trap(EQ, 5) END;

voc-O7/O7ARMv7MP.Mod

@@ -1006,7 +1006,7 @@ MODULE O7ARMv7MP; (*N. Wirth 1.7.97 / 8.2.2020	Oberon compiler for RISC in Obero
 		(*Oberon.Collect(0)*)
 	END Compile;
 
-BEGIN Texts.OpenWriter(W); Texts.WriteString(W, "Oberon -> ARMv7-M Compiler  8.2.2020");
+BEGIN Texts.OpenWriter(W); Texts.WriteString(W, "Oberon -> ARMv7-M Compiler  21.6.2023");
 	Texts.WriteLn(W); Texts.Append(Oberon.Log, W.buf);
 	NEW(dummy); dummy.class := ORB.Var; dummy.type := ORB.intType;
 	expression := expression0; Type := Type0; FormalType := FormalType0