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Coop.ARM.Machine.Mod 9.2 KB

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  1. MODULE Machine;
  2. IMPORT CPU, Environment, Trace, Mutexes, Processors, Timer;
  3. CONST
  4. Version = "A2 Cooperative Revision 5791";
  5. MaxCPU* = Processors.Maximum; (* dummy definition to make GC for both Win32 and I386 work *)
  6. DefaultObjectFileExtension* = ".Obw";
  7. (** bits in features variable *)
  8. MTTR* = 12; MMX* = 23;
  9. debug* = FALSE; (** display more debug output during booting *)
  10. IsCooperative*= TRUE;
  11. CONST
  12. (** standard lock levels (in order) *) (* also refer to Traps.Show *)
  13. TraceOutput* = 0; (* Trace output *)
  14. Memory* = 1; (* Virtual memory management, stack and page allocation *)
  15. Heaps* = 2; (* Storage allocation and Garbage collection *)
  16. Interrupts* = 3; (* Interrupt handling. *)
  17. Modules* = 4; (* Module list *)
  18. Objects* = 5; (* Ready queue *)
  19. KernelLog* = 7; (* Atomic output *)
  20. GC* = 8;
  21. MaxLocks = 9; (* { <= 32 } *)
  22. (* error codes *)
  23. Ok* = 0;
  24. NilAdr* = -1; (* nil value for addresses (not same as pointer NIL value) *)
  25. TYPE
  26. Vendor* = ARRAY 13 OF CHAR;
  27. IDMap* = ARRAY 16 OF SHORTINT;
  28. Range* = RECORD
  29. adr*, size*: LONGINT
  30. END;
  31. MemoryBlock* = POINTER TO MemoryBlockDesc;
  32. MemoryBlockDesc* = RECORD
  33. next- {UNTRACED}: MemoryBlock;
  34. startAdr-: ADDRESS; (* sort key in linked list of memory blocks *)
  35. size-: SIZE;
  36. beginBlockAdr-, endBlockAdr-: ADDRESS
  37. END;
  38. (* dummy definition to make GC work for both I386 and Win32 - copied from BIOS.I386.Machine.Mod, but not really used *)
  39. Stack* = RECORD (** values are read-only *)
  40. low: ADDRESS; (* lowest virtual address that may be allocated for stack *)
  41. adr*: ADDRESS; (* lowest address on allocated stack *) (* exported for Objects only *)
  42. high*: ADDRESS; (* next virtual address after stack *) (* exported for Objects only *)
  43. END;
  44. Address32* = LONGINT;
  45. VAR
  46. MMXSupport*: BOOLEAN;
  47. SSESupport*: BOOLEAN;
  48. SSE2Support*: BOOLEAN;
  49. SSE3Support-: BOOLEAN; (* PH 04/11*)
  50. SSSE3Support-: BOOLEAN;
  51. SSE41Support-: BOOLEAN;
  52. SSE42Support-: BOOLEAN;
  53. SSE5Support-: BOOLEAN;
  54. AVXSupport-: BOOLEAN;
  55. version*: ARRAY 64 OF CHAR; (** Aos version *)
  56. features*,features2*: SET; (** processor features *)
  57. fcr*: SET; (** default floating-point control register value (default rounding mode is towards -infinity, for ENTIER) *)
  58. mhz*: HUGEINT; (** clock rate of GetTimer() in MHz, or 0 if not known *)
  59. boottime-: HUGEINT; (** in timer units *)
  60. VAR
  61. lock-: ARRAY MaxLocks OF CHAR; (* not implemented as SET because of shared access *)
  62. mutex: ARRAY MaxLocks OF Mutexes.Mutex;
  63. memBlockHead-{UNTRACED}, memBlockTail-{UNTRACED}: MemoryBlock; (* head and tail of sorted list of memory blocks *)
  64. (** Convert a string to an integer. Parameter i specifies where in the string scanning should begin (usually 0 in the first call). Scanning stops at the first non-valid character, and i returns the updated position. Parameter s is the string to be scanned. The value is returned as result, or 0 if not valid. Syntax: number = ["-"] digit {digit} ["H" | "h"] . digit = "0" | ... "9" | "A" .. "F" | "a" .. "f" . If the number contains any hexdecimal letter, or if it ends in "H" or "h", it is interpreted as hexadecimal. *)
  65. PROCEDURE StrToInt*( VAR i: LONGINT; CONST s: ARRAY OF CHAR ): LONGINT;
  66. VAR vd, vh, sgn, d: LONGINT; hex: BOOLEAN;
  67. BEGIN
  68. vd := 0; vh := 0; hex := FALSE;
  69. IF s[i] = "-" THEN sgn := -1; INC( i ) ELSE sgn := 1 END;
  70. LOOP
  71. IF (s[i] >= "0") & (s[i] <= "9") THEN d := ORD( s[i] ) - ORD( "0" )
  72. ELSIF (CAP( s[i] ) >= "A") & (CAP( s[i] ) <= "F") THEN d := ORD( CAP( s[i] ) ) - ORD( "A" ) + 10; hex := TRUE
  73. ELSE EXIT
  74. END;
  75. vd := 10 * vd + d; vh := 16 * vh + d; INC( i )
  76. END;
  77. IF CAP( s[i] ) = "H" THEN hex := TRUE; INC( i ) END; (* optional H *)
  78. IF hex THEN vd := vh END;
  79. RETURN sgn * vd
  80. END StrToInt;
  81. (** -- Atomic operations -- *)
  82. (** This procedure should be called in all spin loops as a hint to the processor (e.g. Pentium 4). *)
  83. PROCEDURE -SpinHint*;
  84. CODE
  85. END SpinHint;
  86. (* Return current instruction pointer *)
  87. PROCEDURE CurrentPC* (): ADDRESS;
  88. CODE
  89. MOV R0, PC
  90. END CurrentPC;
  91. PROCEDURE MapPhysical*(physAdr: ADDRESS; size: SIZE; VAR virtAdr: ADDRESS);
  92. BEGIN
  93. virtAdr := physAdr;
  94. END MapPhysical;
  95. (** Unmap an area previously mapped with MapPhysical. *)
  96. PROCEDURE UnmapPhysical*(virtAdr: ADDRESS; size: SIZE);
  97. END UnmapPhysical;
  98. (** Translate a virtual address range to num ranges of physical address. num returns 0 on error. *)
  99. PROCEDURE TranslateVirtual*(virtAdr: ADDRESS; size: SIZE; VAR num: LONGINT; VAR physAdr: ARRAY OF Range);
  100. CONST PS = 4096;
  101. VAR ofs, phys1: ADDRESS; size1: SIZE;
  102. BEGIN
  103. num := 0;
  104. LOOP
  105. IF size = 0 THEN EXIT END;
  106. IF num = LEN(physAdr) THEN num := 0; EXIT END; (* index check *)
  107. ofs := virtAdr MOD PS; (* offset in page *)
  108. size1 := PS - ofs; (* distance to next page boundary *)
  109. IF size1 > size THEN size1 := size END;
  110. phys1 := virtAdr - ofs;
  111. physAdr[num].adr := phys1 - phys1 MOD PS + ofs;
  112. physAdr[num].size := size1; INC(num);
  113. INC(virtAdr, size1); DEC(size, size1)
  114. END;
  115. IF num = 0 THEN physAdr[0].adr := NilAdr; physAdr[0].size := 0 END;
  116. END TranslateVirtual;
  117. PROCEDURE Ensure32BitAddress*(adr: ADDRESS): Address32;
  118. BEGIN
  119. ASSERT (Address32 (adr) = adr);
  120. RETURN Address32 (adr);
  121. END Ensure32BitAddress;
  122. PROCEDURE Is32BitAddress*(adr: ADDRESS): BOOLEAN;
  123. BEGIN RETURN Address32 (adr) = adr;
  124. END Is32BitAddress;
  125. (** Fill "size" bytes at "destAdr" with "filler". "size" must be multiple of 4. *)
  126. PROCEDURE Fill32*(destAdr: ADDRESS; size: SIZE; filler: LONGINT);
  127. CODE
  128. LDR R0, [FP, #filler]
  129. LDR R1, [FP, #size]
  130. LDR R3, [FP, #destAdr]
  131. MOV R4, #0; counter
  132. (* Check size MOD 4 = 0 *)
  133. LSR R5, R1, #2
  134. LSL R5, R5, #2
  135. CMP R5, R1
  136. BEQ Loop
  137. SWI #8
  138. Loop:
  139. CMP R4, R1
  140. BGE Exit
  141. ADD R5, R3, R4
  142. STR R0, [R5, #0]; put(destAdr + counter, filler)
  143. ADD R4, R4, #4; INC(counter, 4)
  144. B Loop
  145. Exit:
  146. END Fill32;
  147. PROCEDURE GetConfig* ( CONST name: ARRAY OF CHAR; VAR val: ARRAY OF CHAR );
  148. PROCEDURE GetString EXTERN "Environment.GetString" ( CONST name: ARRAY OF CHAR; VAR val: ARRAY OF CHAR );
  149. BEGIN GetString (name, val);
  150. END GetConfig;
  151. PROCEDURE Shutdown*( restart: BOOLEAN );
  152. BEGIN
  153. IF restart THEN Environment.Reboot ELSE Environment.Shutdown END;
  154. END Shutdown;
  155. PROCEDURE Cli*;
  156. BEGIN HALT (1234);
  157. END Cli;
  158. PROCEDURE Sti*;
  159. BEGIN HALT (1234);
  160. END Sti;
  161. (* Dan: from new Machine *)
  162. PROCEDURE GetTimer*(): HUGEINT;
  163. BEGIN RETURN Timer.GetCounter ();
  164. END GetTimer;
  165. PROCEDURE ID*(): LONGINT;
  166. BEGIN
  167. RETURN Processors.GetCurrentIndex ();
  168. END ID;
  169. (** Acquire a spin-lock. *)
  170. PROCEDURE Acquire*( level: LONGINT ); (* non reentrant lock (non reentrance "ensured" by ASSERT statement ), CriticalSections are reentrant *)
  171. BEGIN
  172. Mutexes.Acquire (mutex[level]);
  173. END Acquire;
  174. (** Release a spin-lock. *)
  175. PROCEDURE Release*( level: LONGINT ); (* release lock *)
  176. BEGIN
  177. Mutexes.Release (mutex[level]);
  178. END Release;
  179. (* returns if an address is a currently allocated heap address *)
  180. PROCEDURE ValidHeapAddress*(p: ADDRESS): BOOLEAN;
  181. BEGIN
  182. RETURN p # NIL;
  183. END ValidHeapAddress;
  184. PROCEDURE GetFreeK* (VAR total, lowFree, highFree: SIZE);
  185. BEGIN
  186. total := 0; lowFree := 0; highFree := 0;
  187. END GetFreeK;
  188. PROCEDURE PhysicalAdr*(adr: ADDRESS; size: SIZE): ADDRESS;
  189. BEGIN RETURN adr;
  190. END PhysicalAdr;
  191. (** -- Atomic operations -- *)
  192. (** Atomic INC(x). *)
  193. PROCEDURE -AtomicInc*( VAR x: LONGINT );
  194. CODE
  195. LDR R0, [SP], #4
  196. loop:
  197. LDREX R1, R0
  198. ADD R1, R1, #1
  199. STREX R2, R1, R0
  200. CMP R2, #0
  201. BNE loop
  202. END AtomicInc;
  203. (** Atomic DEC(x). *)
  204. PROCEDURE -AtomicDec*( VAR x: LONGINT );
  205. CODE
  206. LDR R0, [SP], #4
  207. loop:
  208. LDREX R1, R0
  209. SUB R1, R1, #1
  210. STREX R2, R1, R0
  211. CMP R2, #0
  212. BNE loop
  213. END AtomicDec;
  214. (** Atomic INC(x, y). *)
  215. PROCEDURE -AtomicAdd*( VAR x: LONGINT; y: LONGINT );
  216. CODE
  217. LDR R3, [SP], #4 ; R3 := y
  218. LDR R0, [SP], #4 ; R0 := ADR(x)
  219. loop:
  220. LDREX R1, R0 ; R1 := x
  221. ADD R1, R1, R3 ; increment x
  222. STREX R2, R1, R0
  223. CMP R2, #0
  224. BNE loop ; if store failed, try again, else exit
  225. END AtomicAdd;
  226. (** Atomic test-and-set. Set x = TRUE and return old value of x. *)
  227. PROCEDURE AtomicTestSet*( VAR x: BOOLEAN ): BOOLEAN;
  228. CODE
  229. MOV R2, #1 ; R2 := TRUE
  230. MOV R1, #0 ; R1 := FALSE
  231. LDR R3, [SP], #4 ; R3 := ADDRESSOF(x)
  232. loop:
  233. LDREX R0, R3 ; load excl x
  234. CMP R0, R1
  235. BNE exit ; x # old -> exit
  236. STREX R4, R2, R3 ; x = old -> store excl new -> x
  237. CMP R4, #0
  238. BNE loop ; store exclusive failed: retry
  239. exit:
  240. END AtomicTestSet;
  241. (* Atomic compare-and-swap. Set x = new if x = old and return old value of x *)
  242. PROCEDURE -AtomicCAS* (VAR x: LONGINT; old, new: LONGINT): LONGINT;
  243. CODE
  244. LDR R2, [SP], #4 ; R2 := new
  245. LDR R1, [SP], #4 ; R1 := old
  246. LDR R3, [SP], #4 ; R3 := ADDRESSOF(x)
  247. loop:
  248. LDREX R0, R3 ; load excl x
  249. CMP R0, R1
  250. BNE exit ; x # old -> exit
  251. STREX R4, R2, R3 ; x = old -> store excl new -> x
  252. CMP R4, #0
  253. BNE loop ; store exclusive failed: retry
  254. exit:
  255. END AtomicCAS;
  256. (* function returning the number of processors that are available to Aos *)
  257. PROCEDURE NumberOfProcessors*( ): LONGINT;
  258. BEGIN
  259. RETURN Processors.count;
  260. END NumberOfProcessors;
  261. PROCEDURE InvalidateDCacheRange*(a: ADDRESS; s: SIZE);
  262. BEGIN
  263. END InvalidateDCacheRange;
  264. PROCEDURE FlushDCacheRange*(a: ADDRESS; s: SIZE);
  265. BEGIN
  266. END FlushDCacheRange;
  267. BEGIN
  268. Trace.String("Machine: "); Trace.Blue; Trace.StringLn (Version); Trace.Default;
  269. boottime:=GetTimer();
  270. COPY( Version, version );
  271. END Machine.