Cronologia Commit

Autore SHA1 Messaggio Data
  felixf d8297e4250 Corrected part type for high part of double precision floating point complex registers 9 anni fa
  felixf 258bb5c3ed Support of 64-bit floating point instructions (using the old mnemonics but compatible to NEON) 9 anni fa
  felixf 6cb71d60ee ARM Backend: 9 anni fa
  eth.tmartiel 20c90e6bc1 Fixed incorrect code generation for instructions like: 9 anni fa
  felixf 593f9317f9 patched problem with iterative compilation from ActiveCells 9 anni fa
  felixf 316732e6df Preparations for Unix x64: 64-bit calling convention (being different from that of the WinAPI) 9 anni fa
  felixf 723ad5af1e More patches with regards to link register used in RPI coop 9 anni fa
  felixf e7ca9ce59f removed dependencies on module ActiveCells, Hardware and TRMTools 9 anni fa
  felixf cd5558f722 added standard compiler components 9 anni fa
  felixf b807cd2062 Changed interface of register store builtins (address type). 10 anni fa
  eth.negelef 9c5a6fae4d Fixed assertion 10 anni fa
  eth.negelef 58a688deaf Added basic support for CAS instructions 10 anni fa
  eth.negelef 6bdb2cc40f Added basic support for AP register in cooperative mode 10 anni fa
  felixf f0c6e7a868 Patched right shift 10 anni fa
  felixf 77a1d04c46 Patched an issue with allocating stack during enter -- tested with Minos and it works now. 10 anni fa
  felixf 6d40241026 resolved issues with Minos 10 anni fa
  felixf 5f23454cbf Moved parts of the calling / stack convention to front-end. Stack layout harmonized: 10 anni fa
  felixf 8299ab8c4b Moved ARM backend and Minos Object File from OC repository to A2 trunk 10 anni fa