 felixf
|
c222e0e64c
Added support of Division via FPU unit
|
9 anni fa |
|
felixf
|
3c00209322
Enabled separate imports / separate compilation of cells within a module (TRM / ARM / AMD separation)
|
9 anni fa |
|
felixf
|
a96cb393b1
Register overlap protect
|
9 anni fa |
|
felixf
|
07d0ab5616
Patched an important bug with pop on double
|
9 anni fa |
|
felixf
|
ec95e4b945
Assert that zero/sign extension does not operate on memory operands (i.e. only on registers)
|
9 anni fa |
|
felixf
|
ecb47b0376
Patched a bug for conversion to hugeint
|
9 anni fa |
|
felixf
|
2e03908b35
Minor patches
|
9 anni fa |
|
felixf
|
3d3c819260
Interoperability between runtime and modules with or without FPU32 or FPU64 support
|
9 anni fa |
|
felixf
|
8162455970
Patched issues with FLDD (offset is word relative, not byte relative)
|
9 anni fa |
|
felixf
|
13bc53f056
Patched emission of fixup blocks
|
9 anni fa |
|
felixf
|
c5960d0381
Improved references mechanism (failsafe against different fixup widths and more generic)
|
9 anni fa |
|
felixf
|
7ec66430e0
Patched some issues with 64-bit / 32-bit FPU on ARM
|
9 anni fa |
|
felixf
|
32eaaf8bb3
Initial patch to fixup problem
|
9 anni fa |
|
felixf
|
2a33021d59
Patched problem with immediate encoding for FP and ABS for double precision FP
|
9 anni fa |
|
felixf
|
d8297e4250
Corrected part type for high part of double precision floating point complex registers
|
9 anni fa |
|
felixf
|
258bb5c3ed
Support of 64-bit floating point instructions (using the old mnemonics but compatible to NEON)
|
9 anni fa |
|
felixf
|
6cb71d60ee
ARM Backend:
|
9 anni fa |
 eth.tmartiel
|
20c90e6bc1
Fixed incorrect code generation for instructions like:
|
9 anni fa |
|
felixf
|
593f9317f9
patched problem with iterative compilation from ActiveCells
|
9 anni fa |
|
felixf
|
316732e6df
Preparations for Unix x64: 64-bit calling convention (being different from that of the WinAPI)
|
9 anni fa |
|
felixf
|
723ad5af1e
More patches with regards to link register used in RPI coop
|
9 anni fa |
|
felixf
|
e7ca9ce59f
removed dependencies on module ActiveCells, Hardware and TRMTools
|
9 anni fa |
|
felixf
|
cd5558f722
added standard compiler components
|
9 anni fa |
|
felixf
|
b807cd2062
Changed interface of register store builtins (address type).
|
10 anni fa |
 eth.negelef
|
9c5a6fae4d
Fixed assertion
|
10 anni fa |
|
eth.negelef
|
58a688deaf
Added basic support for CAS instructions
|
10 anni fa |
|
eth.negelef
|
6bdb2cc40f
Added basic support for AP register in cooperative mode
|
10 anni fa |
|
felixf
|
f0c6e7a868
Patched right shift
|
10 anni fa |
|
felixf
|
77a1d04c46
Patched an issue with allocating stack during enter -- tested with Minos and it works now.
|
10 anni fa |
|
felixf
|
6d40241026
resolved issues with Minos
|
10 anni fa |
