coop RPI release compiles

git-svn-id: https://svn.inf.ethz.ch/svn/lecturers/a2/trunk@7040 8c9fc860-2736-0410-a75d-ab315db34111

source/I386.CPU.Mod

@@ -146,7 +146,7 @@ PROCEDURE DisableInterrupt- (index: SIZE);
 VAR previous: InterruptHandler;
 BEGIN {UNCOOPERATIVE, UNCHECKED}
 	ASSERT (index < Interrupts);
-	IF previous = NIL THEN DisableIRQ (index) END;
+	DisableIRQ (index);
 	REPEAT previous := CAS (handlers[index], NIL, NIL) UNTIL CAS (handlers[index], previous, NIL) = previous;
 END DisableInterrupt;
 

source/RPI.CPU.Mod

@@ -189,7 +189,7 @@ END MaskIn;
 	
 (* interrupt handling *)
 CONST Interrupts* = 7;
-CONST UndefinedInstruction* = 1; SoftwareInterrupt* = 2; PrefetchAbort* = 3; DataAbort* = 4; IRQ* = 5; FIQ* = 6;
+CONST UndefinedInstruction* = 1; SoftwareInterrupt* = 2; PrefetchAbort* = 3; DataAbort* = 4; IRQ* = 5; FIQ* = 6; IRQ0* = IRQ;
 
 TYPE InterruptHandler* = PROCEDURE (index: SIZE);
 
@@ -218,6 +218,17 @@ BEGIN {UNCOOPERATIVE, UNCHECKED}
 	REPEAT previous := CAS (handlers[index], NIL, NIL) UNTIL CAS (handlers[index], previous, NIL) = previous;
 END DisableInterrupt;
 
+PROCEDURE EnableIRQ- (index: SIZE);
+BEGIN
+	(* no effect -- only for compatibility *)
+END EnableIRQ;
+
+PROCEDURE DisableIRQ-(index: SIZE);
+BEGIN
+	(* no effect -- only for compatibility *)
+END DisableIRQ;
+
+
 PROCEDURE Initialize-;
 CODE
 	ADD	R2, PC, #vector-$-8