Improved representation of aligned records

git-svn-id: https://svn.inf.ethz.ch/svn/lecturers/a2/trunk@6563 8c9fc860-2736-0410-a75d-ab315db34111

source/Activities.Mod

@@ -118,13 +118,12 @@ TYPE Process = OBJECT {DISPOSABLE} (Activity)
 END Process;
 
 (* Stores information per processor. *)
-TYPE Processor = RECORD
+TYPE Processor = RECORD {ALIGNED (CPU.CacheLineSize)}
 	assigning := FALSE: BOOLEAN;
 	originalFramePointer: ADDRESS;
 	readyQueue: ARRAY Priorities OF Queues.AlignedQueue;
 	runningActivity: Activity;
 	index: SIZE;
-	dummy {ALIGNED (CPU.CacheLineSize)} : RECORD END;
 END;
 
 VAR processors: ARRAY Processors.Maximum OF Processor;

source/Counters.Mod

@@ -10,7 +10,7 @@ IMPORT CPU;
 TYPE Counter* = RECORD value := 0: SIZE END;
 
 (** Represents an atomic counter aligned for optimal cache behavior. *)
-TYPE AlignedCounter* = RECORD (Counter) dummy {ALIGNED (CPU.CacheLineSize)} : RECORD END END;
+TYPE AlignedCounter* = RECORD {ALIGNED (CPU.CacheLineSize)} (Counter) END;
 
 (** Returns the current value of an atomic counter. *)
 PROCEDURE Read- (VAR counter: Counter): SIZE;

source/HeapManager.Mod

@@ -22,7 +22,7 @@ TYPE Heap* = RECORD
 	begin, end: ADDRESS; sentinel := 0: SIZE;
 END;
 
-VAR processors: ARRAY Processors.Maximum OF RECORD hazard {UNTRACED}: Block; dummy {ALIGNED (CPU.CacheLineSize)} : RECORD END END;
+VAR processors: ARRAY Processors.Maximum OF RECORD {ALIGNED (CPU.CacheLineSize)} hazard {UNTRACED}: Block END;
 
 (* Computes the index of a block that has the given size. *)
 PROCEDURE GetIndex (size: SIZE): SIZE;

source/Queues.Mod

@@ -26,7 +26,7 @@ END Item;
 TYPE Queue* = RECORD first := NIL, last := NIL: Node END;
 
 (** Represents a first-in first-out data structure which is aligned for optimal cache behavior. *)
-TYPE AlignedQueue* = RECORD (Queue) dummy {ALIGNED (CPU.CacheLineSize)} : RECORD END END;
+TYPE AlignedQueue* = RECORD {ALIGNED (CPU.CacheLineSize)} (Queue) END;
 
 VAR processors: ARRAY Processors.Maximum OF RECORD hazard {UNTRACED}, pooled {UNTRACED}: ARRAY 2 OF Node; dummy {ALIGNED (CPU.CacheLineSize)} : RECORD END END;