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@@ -1,218 +0,0 @@
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-(* Aos, Copyright 2001, Pieter Muller, ETH Zurich *)
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-
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-MODULE MemCache; (** AUTHOR "pjm"; PURPOSE "Memory cache control"; *)
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-
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-IMPORT SYSTEM, Machine;
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-
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-CONST
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- (** cache properties *)
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- UC* = 0; WC* = 1; WT* = 4; WP* = 5; WB* = 6;
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-
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- PS = 4096; (* page size in bytes *)
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- M = 100000H; (* 1K, 1M, 1G *)
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-
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- Ok = 0;
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-
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-TYPE
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- SetCacheMessage = POINTER TO RECORD (Machine.Message)
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- physAdr: ADDRESS; size, type: LONGINT;
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- res: ARRAY Machine.MaxCPU OF LONGINT
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- END;
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-
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-(* Return the value of the MTTRcap register. *)
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-
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-PROCEDURE -GetMTTRcapLow(): SET;
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-CODE {SYSTEM.Pentium, SYSTEM.Privileged}
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- MOV ECX, 0FEH ; MTTRcap
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- RDMSR
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-END GetMTTRcapLow;
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-
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-(*
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-(* Return the value of the MTTRdefType register. *)
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-
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-PROCEDURE -GetMTTRdefTypeLow(): SET;
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-CODE {SYSTEM.Pentium, SYSTEM.Privileged}
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- MOV ECX, 2FFH ; MTTRdefType
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- RDMSR
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-END GetMTTRdefTypeLow;
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-*)
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-
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-(* Return the value of the specified MTTRphysBase register. *)
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-
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-PROCEDURE -GetMTTRphysBaseLow(n: ADDRESS): SET;
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-CODE {SYSTEM.Pentium, SYSTEM.Privileged}
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- POP ECX
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- SHL ECX, 1
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- ADD ECX, 200H ; MTTRphysBase0
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- RDMSR
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-END GetMTTRphysBaseLow;
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-
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-(* Return the value of the specified MTTRphysMask register. *)
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-
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-PROCEDURE -GetMTTRphysMaskLow(n: ADDRESS): SET;
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-CODE {SYSTEM.Pentium, SYSTEM.Privileged}
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- POP ECX
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- SHL ECX, 1
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- ADD ECX, 201H ; MTTRphysMask0
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- RDMSR
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-END GetMTTRphysMaskLow;
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-
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-(* Set the specified MTTRphysBase register. *)
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-
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-PROCEDURE -SetMTTRphysBase(n: ADDRESS; high, low: SET);
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-CODE {SYSTEM.Pentium, SYSTEM.Privileged}
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- POP EAX
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- POP EDX
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- POP ECX
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- SHL ECX, 1
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- ADD ECX, 200H ; MTTRphysBase0
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- WRMSR
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-END SetMTTRphysBase;
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-
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-(* Set the specified MTTRphysMask register. *)
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-
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-PROCEDURE -SetMTTRphysMask(n: ADDRESS; high, low: SET);
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-CODE {SYSTEM.Pentium, SYSTEM.Privileged}
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- POP EAX
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- POP EDX
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- POP ECX
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- SHL ECX, 1
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- ADD ECX, 201H ; MTTRphysMask0
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- WRMSR
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-END SetMTTRphysMask;
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-
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-(** Set the cache properties of the specified physical memory area on the current processor. {physAdr, size MOD PS = 0} Must be called from supervisor mode. *)
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-
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-PROCEDURE LocalSetCacheProperties*(physAdr: ADDRESS; size, type: LONGINT; VAR res: WORD);
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-VAR i, n, f: LONGINT; mask, base: SET; j, k: ADDRESS;
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-BEGIN
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- ASSERT((physAdr MOD PS = 0) & (size MOD PS = 0) & (size # 0));
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- IF (physAdr >= M) OR (physAdr < 0) THEN
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- k := size; WHILE k > 0 DO k := ASH(k, 1) END; (* shift highest set bit into bit 31 *)
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- IF k = 80000000H THEN (* only one bit was set => size is power of 2 *)
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- IF physAdr MOD size = 0 THEN
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- Machine.Acquire(Machine.Memory); (* hack *)
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- IF Machine.MTTR IN Machine.features THEN (* MTTRs supported *)
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- mask := GetMTTRcapLow();
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- IF (type # WC) OR (10 IN mask) THEN
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- n := SYSTEM.VAL(LONGINT, mask * {0..7});
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- i := 0; f := -1; res := Ok;
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- WHILE (i # n) & (res = Ok) DO
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- mask := GetMTTRphysMaskLow(i);
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- IF 11 IN mask THEN (* entry is valid *)
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- mask := mask * {12..MAX(SET)};
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- base := GetMTTRphysBaseLow(i) * mask;
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- j := physAdr; k := physAdr+size;
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- WHILE (j # k) & (SYSTEM.VAL(SET, j) * mask # base) DO INC(j, PS) END; (* performance! *)
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- IF j # k THEN res := 1508 END (* cache type of region already set *)
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- ELSE
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- IF f = -1 THEN f := i END (* first free entry *)
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- END;
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- INC(i)
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- END;
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- IF res = Ok THEN
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- IF f # -1 THEN
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- SetMTTRphysBase(f, {}, SYSTEM.VAL(SET, physAdr) * {12..31} + SYSTEM.VAL(SET, type) * {0..7});
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- SetMTTRphysMask(f, {0..3}, (-SYSTEM.VAL(SET, size-1)) * {12..31} + {11})
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- ELSE
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- res := 1506 (* out of cache control entries *)
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- END
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- ELSE
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- (* skip *)
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- END
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- ELSE
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- res := 1511 (* region type not supported *)
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- END
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- ELSE
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- res := 1505 (* MTTRs not supported *)
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- END;
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- Machine.Release(Machine.Memory)
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- ELSE
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- res := 1510 (* region base must be aligned on size *)
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- END
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- ELSE
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- res := 1509 (* region size must be power of 2 *)
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- END
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- ELSE
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- res := 1507 (* implementation restriction - fixed entries not supported *)
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- END
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-END LocalSetCacheProperties;
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-
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-PROCEDURE HandleSetCacheProperties(id: LONGINT; CONST state: Machine.State; msg: Machine.Message);
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-BEGIN
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- WITH msg: SetCacheMessage DO
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- (* to do: page 11-25 *)
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- LocalSetCacheProperties(msg.physAdr, msg.size, msg.type, msg.res[id])
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- END
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-END HandleSetCacheProperties;
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-
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-(** Broadcast a LocalSetCacheProperties operation to all processors. *)
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-
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-PROCEDURE GlobalSetCacheProperties*(physAdr: ADDRESS; size, type: LONGINT; VAR res: WORD);
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-VAR i: LONGINT; msg: SetCacheMessage;
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-BEGIN
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- NEW(msg); msg.physAdr := physAdr; msg.size := size; msg.type := type;
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- FOR i := 0 TO Machine.MaxCPU-1 DO msg.res[i] := 2304 END; (* default result *)
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- Machine.Broadcast(HandleSetCacheProperties, msg, {Machine.Self, Machine.FrontBarrier, Machine.BackBarrier});
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- res := 0;
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- FOR i := 0 TO Machine.MaxCPU-1 DO
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- IF (res = 0) & (msg.res[i] # 0) THEN res := msg.res[i] END (* return first non-ok result found *)
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- END
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-END GlobalSetCacheProperties;
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-
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-(** Disable all caching on the current processor. *)
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-
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-PROCEDURE LocalDisableCaching*;
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-CODE {SYSTEM.Pentium, SYSTEM.Privileged}
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- PUSHFD
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- CLI
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-
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- MOV EAX, CR0
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- OR EAX, 40000000H
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- AND EAX, 0DFFFFFFFH
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- MOV CR0, EAX
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-
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- WBINVD
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-
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- MOV EAX, CR4
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- AND EAX, 0FFFFFF7FH
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- MOV CR4, EAX
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-
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- MOV EAX, CR3
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- MOV CR3, EAX
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-
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- MOV ECX, 2FFH ; MTTRdefType
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- MOV EAX, 0
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- MOV EDX, 0
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- WRMSR
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-
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- WBINVD
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-
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- MOV EAX, CR3
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- MOV CR3, EAX
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-
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- MOV EAX, CR0
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- OR EAX, 60000000H
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- MOV CR0, EAX
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-
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- POPFD
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-END LocalDisableCaching;
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-
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-PROCEDURE HandleDisableCaching(id: LONGINT; CONST state: Machine.State; msg: Machine.Message);
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-BEGIN
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- LocalDisableCaching
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-END HandleDisableCaching;
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-
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-(** Broadcast a LocalDisableCaching operation to all processors. *)
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-
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-PROCEDURE GlobalDisableCaching*;
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-BEGIN
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- Machine.Broadcast(HandleDisableCaching, NIL, {Machine.Self, Machine.FrontBarrier, Machine.BackBarrier})
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-END GlobalDisableCaching;
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-
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-END MemCache.
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-
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-(*
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-to do:
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-o change error codes
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-*)
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negelef