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@@ -315,50 +315,6 @@ TYPE
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*)
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END DivModU64;
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- (* ---- FLOATING POINT EMULATION ----
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- The following procedures are used in case the target platform does not feature a math coprocessor (aka VFP unit).
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- Most of the code was taken from the Minos FPU emulation module "FPU.Mos".
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-
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- Note that parameters and return types are declared as integers, even though they do contain floating point values
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- according to the IEEE standard.
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- *)
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-
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- (** Tests for 0.0 (+0 or -0)
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- - corresponds to SYSTEM.NULL **)
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- PROCEDURE IsZeroF32(float: FLOAT32): BOOLEAN;
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- CODE
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- LDR R0, [FP, #+float] ; R0 := float
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- BIC R0, R0, #S ; clear the sign bit
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- CMP R0, #0 ; IF R0 = 0
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- MOVEQ R0, #1 ; THEN RETURN TRUE
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- MOVNE R0, #0 ; ELSE RETURN FALSE
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- END IsZeroF32;
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-
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- (** Serves to obtain the sign for products and quotients.
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- - corresponds to SYSTEM.XOR **)
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- PROCEDURE SignXorF32(left, right: FLOAT32): FLOAT32;
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- CODE
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- LDR R0, [FP, #+left] ; R0 := left
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- LDR R1, [FP, #+right] ; R1: = right
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- EOR R0, R0, R1 ; R0 := R0 xor R1
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- AND R0, R0, #S ; clear all bits except the sign bit
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- END SignXorF32;
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-
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- (** multiplies two 32-bit unsigned integer to produce a 64-bit result: [resultLow | resultHigh] = left * right
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- - corresponds to SYSTEM.MULD (but the low and high part of the result are passed explicitly) **)
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- PROCEDURE MulD(VAR resultLow, resultHigh: FLOAT32; left, right: FLOAT32);
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- CODE
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- LDR R2, [FP, #+resultLow] ; R2 := address of resultLow
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- LDR R3, [FP, #+resultHigh] ; R3: = address of resultHigh
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- LDR R4, [FP, #+left] ; R4 := left
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- LDR R5, [FP, #+right] ; R5: = right
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-
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- UMULL R0, R1, R4, R5
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-
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- STR R0, [R4, #+0]
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- STR R1, [R5, #+0]
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- END MulD;
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-
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PROCEDURE NegF32*(float: FLOAT32): FLOAT32;
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CODE
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LDR R0, [FP, #+float] ; R0 := float
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@@ -585,14 +541,6 @@ TYPE
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END ;
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RETURN x
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END ConvF32S32;
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-
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- (** whether x < y
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- - note that this operation should rather be done by direct code emission of the backend
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- **)
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- PROCEDURE LessThanF32(x, y: FLOAT32): BOOLEAN;
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- BEGIN
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- HALT(200)
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- END LessThanF32;
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(* ---- STRING OPERATIONS ---- *)
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