Merged srE module

git-svn-id: https://svn-dept.inf.ethz.ch/svn/lecturers/a2/trunk@8724 8c9fc860-2736-0410-a75d-ab315db34111

source/I386.srE.Mod

@@ -1,90 +0,0 @@
-MODULE srE;
-IMPORT SYSTEM, srBase;
-
-TYPE SREAL=srBase.SREAL;
-
-(* procedure for casting real array to integer array. From Patrik Reali ETHZ 2000*)
-
-PROCEDURE E*(VAR p: srBase.PT; VAR ijk: srBase.IPT);
-VAR
-	in: ARRAY 3 OF SREAL;
-	out: ARRAY 3 OF INTEGER;
-BEGIN
-	in[0]:=p.x;in[1]:=p.y; in[2]:=p.z;
-	Eprime(in,out);
-	ijk.i:=out[0]; ijk.j:=out[1]; ijk.k:=out[2];
-END E;
-
-PROCEDURE Eprime(VAR in:ARRAY OF SREAL; VAR out: ARRAY OF INTEGER);
-CODE {SYSTEM.i386, SYSTEM.FPU}
-   PUSH  ECX
-   MOV   EDI, [EBP+out+0]         ; dest   = ADR(out)
-   MOV   ECX, [EBP+out+4]       ; count  = LEN(out)
-   MOV   ESI, [EBP+in+0]        ; source = ADR(in)
-   CMP   ECX, [EBP+in+4]
-   JGE   Ok
-   PUSH  99                  ; LEN(in) > LEN(out)  then TRAP(99)
-   INT   3
-Ok:
-   SUB   ESP, 8              ; change FPU rounding to "chop"
-   FSTCW [ESP]
-   FWAIT
-   MOV   EBX, [ESP]
-   OR    EBX, 0400H          ; clear bit 10,11 (chop/truncate toward zero)
-   MOV   [ESP+4], EBX
-   FLDCW [ESP+4]
-   JMP   Check
-Loop:
-   DEC   ECX
-   FLD   DWORD [ESI+ECX*4]  ; in: SREAL
-   FISTP WORD [EDI+ECX*2]   ; out: INTEGER
-   FWAIT
-Check:
-   CMP   ECX, 0
-   JG    Loop
-   FLDCW [ESP]               ; restore original FPU configuration
-   ADD   ESP, 8
-   POP   ECX
-END Eprime;
-
-PROCEDURE E2*(in: srBase.PT; VAR out: srBase.IPT);
-(*
-BEGIN
-	ROUND(in[0], out[0]);
-	ROUND(in[1], out[1]);
-	ROUND(in[2], out[2]); *)
-END E2;
-
-(* PROCEDURE ROUND(x: SREAL; VAR y: LONGINT);
-CODE {SYSTEM.i386, SYSTEM.FPU}
-       FLD x[EBP]
-       MOV EAX, y[EBP]
-       FISTP DWORD 0[EAX]
-END ROUND;
-
-PROCEDURE ROUND(x: LONGSREAL; VAR y: LONGINT);
-CODE {SYSTEM.i386, SYSTEM.FPU}
-       FLD [EBP+x]
-       MOV EAX, [EBP+y]
-       FISTP DWORD [EAX]
-END ROUND; *)
-
-PROCEDURE -ROUND*(x: SREAL; VAR y: LONGINT);
-CODE {SYSTEM.i386, SYSTEM.FPU}
-       POP EAX
-       FLD DWORD [EBP]
-       ADD ESP, 4
-       FISTP DWORD [EAX]
-END ROUND;
-
-(* PROCEDURE -ROUND(x: LONGSREAL; VAR y: LONGINT);
-CODE {SYSTEM.i386, SYSTEM.FPU}
-       POP EAX
-       FLD QWORD [EBP]
-       ADD ESP, 8
-       FISTP DWORD [EAX]
-END ROUND;
-*)
-
-END srE.
-

source/Release.Tool

@@ -1503,8 +1503,7 @@ PACKAGE Contributions ARCHIVE "Contributions.zip" SOURCE "ContributionsSrc.zip"
 
 	srRenderTools.Text srReadMe.Text	# Realtime Fractal-Voxel Raytracer (Soren Renner)
 	srBase.Mod srRayEngine.Mod srMath.Mod
-	I386 { I386.srE.Mod }
-	AMD64 { AMD64.srE.Mod }
+	I386, AMD64 { srE.Mod }
 	srGL.Mod srHex.Mod srImage.Mod
 	srVoxel.Mod srVoxel2.Mod srVoxel3.Mod srVolShader.Mod srVoxel4.Mod srVoxel5.Mod
 	srM2Space.Mod srM3Space.Mod srM5Space.Mod srM6Space.Mod srRastermovie.Mod

source/AMD64.srE.Mod → source/srE.Mod

@@ -16,7 +16,37 @@ BEGIN
 END E;
 
 PROCEDURE Eprime(VAR in:ARRAY OF SREAL; VAR out: ARRAY OF INTEGER);
-CODE {SYSTEM.AMD64, SYSTEM.FPU}
+CODE
+#IF I386 THEN
+   PUSH  ECX
+   MOV   EDI, [EBP+out+0]         ; dest   = ADR(out)
+   MOV   ECX, [EBP+out+4]       ; count  = LEN(out)
+   MOV   ESI, [EBP+in+0]        ; source = ADR(in)
+   CMP   ECX, [EBP+in+4]
+   JGE   Ok
+   PUSH  99                  ; LEN(in) > LEN(out)  then TRAP(99)
+   INT   3
+Ok:
+   SUB   ESP, 8              ; change FPU rounding to "chop"
+   FSTCW [ESP]
+   FWAIT
+   MOV   EBX, [ESP]
+   OR    EBX, 0400H          ; clear bit 10,11 (chop/truncate toward zero)
+   MOV   [ESP+4], EBX
+   FLDCW [ESP+4]
+   JMP   Check
+Loop:
+   DEC   ECX
+   FLD   DWORD [ESI+ECX*4]  ; in: SREAL
+   FISTP WORD [EDI+ECX*2]   ; out: INTEGER
+   FWAIT
+Check:
+   CMP   ECX, 0
+   JG    Loop
+   FLDCW [ESP]               ; restore original FPU configuration
+   ADD   ESP, 8
+   POP   ECX
+#ELSIF AMD64 THEN
    #IF COOP THEN
       PUSH   RBX
    #END
@@ -49,6 +79,9 @@ Check:
    #IF COOP THEN
       POP   RBX
    #END
+#ELSE
+   unimplemented
+#END
 END Eprime;
 
 PROCEDURE E2*(in: srBase.PT; VAR out: srBase.IPT);
@@ -74,11 +107,20 @@ CODE {SYSTEM.i386, SYSTEM.FPU}
 END ROUND; *)
 
 PROCEDURE -ROUND*(x: SREAL; VAR y: LONGINT);
-CODE {SYSTEM.AMD64, SYSTEM.FPU}
+CODE
+#IF I386 THEN
+       POP EAX
+       FLD DWORD [EBP]
+       ADD ESP, 4
+       FISTP DWORD [EAX]
+#ELSIF AMD64 THEN
        POP RAX
        FLD DWORD [RBP]
        ADD RSP, 8
        FISTP DWORD [RAX]
+#ELSE
+       unimplemented
+#END
 END ROUND;
 
 (* PROCEDURE -ROUND(x: LONGSREAL; VAR y: LONGINT);